As one of the transistors which are operative at high voltage, the LDMOS (lateral double-diffused metal-oxide-semiconductor) transistor is known. The LDMOS transistor includes a lightly doped diffused layer (drift region) of the same conductivity type as the drain diffused layer laid out between the gate electrode and the drain diffused layer to mitigate the field intensity between the drain and the gate to thereby improve the drain breakdown voltage.
The followings are examples of related: Japanese Laid-open Patent Publication No. 2009-170468; Japanese Laid-open Patent Publication No. 2011-096967; and Japanese Laid-open Patent Publication No. 2012-104678.
However, there are cases that it is difficult to ensure a desired breakdown voltages of the LDMOS transistor, depending on the structures, e.g., the layout relationships between the diffused layers formed in the substrate and the gate electrode, and use modes. Accordingly, the transistor of such structure, and devices including the transistors of such structure has the risk of lowering the performance.